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view demo/more/dlist.urs @ 1269:9f4b9315810d
Improve consNeq to detect unequal projected cons
author | Adam Chlipala <adamc@hcoop.net> |
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date | Tue, 01 Jun 2010 10:44:57 -0400 |
parents | e9c5992bc9bc |
children | 68429cfce8db |
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con dlist :: Type -> Type type position val create : t ::: Type -> transaction (dlist t) val clear : t ::: Type -> dlist t -> transaction unit val append : t ::: Type -> dlist t -> t -> transaction position val replace : t ::: Type -> dlist t -> list t -> transaction unit val delete : position -> transaction unit val elements : t ::: Type -> dlist t -> signal (list t) val size : t ::: Type -> dlist t -> signal int val numPassing : t ::: Type -> (t -> signal bool) -> dlist t -> signal int val foldl : t ::: Type -> acc ::: Type -> (t -> acc -> signal acc) -> acc -> dlist t -> signal acc val render : ctx ::: {Unit} -> [ctx ~ body] => t ::: Type -> (t -> position -> xml (ctx ++ body) [] []) -> {StartPosition : signal (option int), MaxLength : signal (option int), Filter : t -> signal bool, Sort : signal (option (t -> t -> signal bool)) (* <= *)} -> dlist t -> xml (ctx ++ body) [] []