view demo/more/checkGroup.urs @ 1139:398ed1b89ee7

Change to satisfy GCC implicit aliasing rules
author Adam Chlipala <adamc@hcoop.net>
date Sat, 30 Jan 2010 12:00:08 -0500
parents 7facf72aaf0a
children
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con t :: {Unit} -> Type -> Type

val create : ctx ::: {Unit} -> data ::: Type -> list (data * xml ctx [] [] * bool) -> transaction (t ctx data)
val render : ctx ::: {Unit} -> data ::: Type -> [[Body] ~ ctx] => t ([Body] ++ ctx) data -> xml ([Body] ++ ctx) [] []
val selected : ctx ::: {Unit} -> data ::: Type -> t ctx data -> signal (list data)