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comparison src/compiler.sml @ 1236:d5ecceb7d1a1

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Completely redid main Iflow logic; so far, policy and policy2 work
author Adam Chlipala <adamc@hcoop.net>
date Tue, 13 Apr 2010 16:30:46 -0400
parents a7b773f1d053
children beb67ff4c8a0
comparison
equal deleted inserted replaced
1235:a7b773f1d053 1236:d5ecceb7d1a1
73 print : 'dst -> Print.PD.pp_desc, 73 print : 'dst -> Print.PD.pp_desc,
74 time : 'src * pmap -> 'dst option * pmap 74 time : 'src * pmap -> 'dst option * pmap
75 } 75 }
76 76
77 val debug = ref false 77 val debug = ref false
78 val doIflow = ref false 78 val doIflow = ref true
79 79
80 fun transform (ph : ('src, 'dst) phase) name = { 80 fun transform (ph : ('src, 'dst) phase) name = {
81 func = fn input => let 81 func = fn input => let
82 val () = if !debug then 82 val () = if !debug then
83 print ("Starting " ^ name ^ "....\n") 83 print ("Starting " ^ name ^ "....\n")