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annotate caching-tests/test.urs @ 2293:8be54d7bd06e

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Trivial change to benchmark.
author Ziv Scully <ziv@mit.edu>
date Wed, 18 Nov 2015 14:48:24 -0500
parents c05f9a5e0f0f
children f8903af753ff
rev   line source
ziv@2213 1 val cache : int -> transaction page
ziv@2276 2 val cacheR : {Id : int, FooBar : int} -> transaction page
ziv@2275 3 (* val cache2 : int -> int -> transaction page *)
ziv@2213 4 val flush : int -> transaction page
ziv@2275 5 val flash : int -> transaction page
ziv@2275 6 val floosh : int -> transaction page
ziv@2275 7 (* val flush17 : transaction page *)