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annotate demo/more/checkGroup.urs @ 1164:8679ba87cf3c

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sigfile directive
author Adam Chlipala <adamc@hcoop.net>
date Thu, 11 Feb 2010 09:10:01 -0500
parents 7facf72aaf0a
children
rev   line source
adamc@1025 1 con t :: {Unit} -> Type -> Type
adamc@1025 2
adamc@1025 3 val create : ctx ::: {Unit} -> data ::: Type -> list (data * xml ctx [] [] * bool) -> transaction (t ctx data)
adamc@1025 4 val render : ctx ::: {Unit} -> data ::: Type -> [[Body] ~ ctx] => t ([Body] ++ ctx) data -> xml ([Body] ++ ctx) [] []
adamc@1025 5 val selected : ctx ::: {Unit} -> data ::: Type -> t ctx data -> signal (list data)