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annotate demo/buffer.urs @ 2279:32a407902d3b

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Rewrite LRU cache. Now uses one big hash table and is less buggy.
author Ziv Scully <ziv@mit.edu>
date Wed, 11 Nov 2015 20:01:48 -0500
parents 755a71c99be5
children
rev   line source
adamc@697 1 type t
adamc@697 2
adamc@697 3 val create : transaction t
adamc@697 4 val render : t -> signal xbody
adamc@697 5 val write : t -> string -> transaction unit