annotate tests/buffer.urs @ 2234:2f7ed04332a0

Progress on LRU cache but still more known bugs to fix.
author Ziv Scully <ziv@mit.edu>
date Sun, 28 Jun 2015 12:46:51 -0700
parents 2197f0e24a9f
children
rev   line source
adamc@728 1 type t
adamc@728 2
adamc@728 3 val create : transaction t
adamc@728 4 val render : t -> signal xbody
adamc@728 5 val write : t -> string -> transaction unit