annotate demo/more/dlist.urs @ 1864:1aa9629e3a4c
Allow [where con] to descend within submodule structure; open submodule constraints while checking later signature items
author |
Adam Chlipala <adam@chlipala.net> |
date |
Mon, 19 Aug 2013 12:25:32 -0400 |
parents |
68429cfce8db |
children |
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rev |
line source |
adamc@915
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1 con dlist :: Type -> Type
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adamc@915
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2 type position
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adamc@915
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3
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adamc@951
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4 val create : t ::: Type -> transaction (dlist t)
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adamc@915
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5 val clear : t ::: Type -> dlist t -> transaction unit
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adamc@915
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6 val append : t ::: Type -> dlist t -> t -> transaction position
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adamc@954
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7 val replace : t ::: Type -> dlist t -> list t -> transaction unit
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adamc@954
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8
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adamc@915
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9 val delete : position -> transaction unit
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adamc@915
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10 val elements : t ::: Type -> dlist t -> signal (list t)
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adamc@964
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11 val size : t ::: Type -> dlist t -> signal int
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adamc@965
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12 val numPassing : t ::: Type -> (t -> signal bool) -> dlist t -> signal int
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adamc@937
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13 val foldl : t ::: Type -> acc ::: Type -> (t -> acc -> signal acc) -> acc -> dlist t -> signal acc
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adamc@915
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14
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adam@1641
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15 val render : ctx ::: {Unit} -> [ctx ~ [Dyn]] => t ::: Type
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adam@1641
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16 -> (t -> position -> xml (ctx ++ [Dyn]) [] [])
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adamc@962
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17 -> {StartPosition : signal (option int),
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adamc@963
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18 MaxLength : signal (option int),
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adamc@962
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19 Filter : t -> signal bool,
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adamc@952
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20 Sort : signal (option (t -> t -> signal bool)) (* <= *)}
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adamc@915
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21 -> dlist t
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adam@1641
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22 -> xml (ctx ++ [Dyn]) [] []
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